Gregory Naisat (Naitzat)

Gregory Naisat (Naitzat)

Publications and workshops

M-Boost: Profiling and Refining Deep Neural Networks with Topological Data Analysis

Published in KDD 2018 Workshop on Interactive Data Exploration and Analytics, 2018

This extended abstract reports work in progress on a topology based approach to the problem of profiling, diagnosing and refining black-box models, with particular emphasis on deep neural networks. The proposed method is named M-Boost and relies on the mapper algorithm from topology, recursively identifying groups of observations where the accuracy can be improved.

Recommended citation: G Naitzat, N Lokare, J Silva, I Kaynar-Kabul, M-Boost: Profiling and Refining Deep Neural Networks with Topological Data Analysis. Workshop on Interactive Data Exploration and Analytics, KDD 2018, London, UK. http://poloclub.gatech.edu/idea2018/papers/idea18-paper10-naitzat.pdf

Tropical Geometry of Deep Neural Networks

Published in Proceedings of the 35th International Conference on Machine Learning, 2018

This paper is about theory of deep neural network, in which we establish connections between feedforward neural networks with ReLU activation and tropical geometry — we show that the family of such neural networks is equivalent to the family of tropical rational maps. Among other things, we deduce that feedforward ReLU neural networks with one hidden layer can be characterized by zonotopes, which serve as building blocks for deeper networks; we relate decision boundaries of such neural networks to tropical hypersurfaces, a major object of study in tropical geometry; and we prove that linear regions of such neural networks correspond to vertices of polytopes associated with tropical rational functions. An insight from our tropical formulation is that a deeper network is exponentially more expressive than a shallow nxetwork

Recommended citation: Liwen Zhang, Gregory Naitzat, Lek-Heng Lim; "Tropical Geometry of Deep Neural Networks" Proceedings of the 35th International Conference on Machine Learning, PMLR 80:5824-5832, 2018. http://proceedings.mlr.press/v80/zhang18i.html

A central limit theorem for the Euler integral of a Gaussian random field

Published in Stochastic Processes and their Applications, 2017

This paper is about random Gaussian fields in the context of applied topology. Applied topology is a new field of study, the purpose of which is to use abstract topological notion for data analysis and other ``real-world” problems. The Euler integral is a good example of the kind of tools developed within applied topology and is a relatively old concept built on the topological notion of Euler-Poincare characteristics. It exploits the inclusion-exclusion property of the Euler characteristic to define an integration-like operation on functions on topological spaces. Euler integrals of deterministic functions have recently been shown to have a wide variety of possible applications, including signal processing, data aggregation and network sensing. Adding random noise to these scenarios, as is natural in the majority of applications, leads to a need for statistical analysis, the first step of which requires asymptotic distribution results for estimators. The first such result is provided in this paper, as a central limit theorem for the Euler integral of pure, Gaussian, noise fields.

Recommended citation: Naitzat, Gregory & Adler, Robert J., 2017. "A central limit theorem for the Euler integral of a Gaussian random field" Stochastic Processes and their Applications, Elsevier, vol. 127(6), pages 2036-2067. https://www.sciencedirect.com/science/article/pii/S0304414916301697

An RSA processor for near real-time operation

Published in IEEE, COMCAS, 2009

The goal of this paper is to research the feasibility of designing and implementing an economical architecture for the real time computation of RSA algorithm, in a sense that the architecture could be implemented on single ASIC with standard logic and power supply. The main challenge in implementing such a design comes out of a need to make arithmetic computations involving very large numbers with bit lengths of thousands of digits. To overcome this, special design of hardware is needed at the algorithms level, and also at the circuit level. The final implementation of our hardware is based on four known algorithms leveraging the use of a CCSA (Carry-Completion-Sensing-Adder) as the building block of the design.

Recommended citation: D. L. Fleischer, G. Naitzat and L. Prokupets, "An RSA processor for near real-time operation," 2009 IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems, Tel Aviv, 2009, pp. 1-4. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5386066&isnumber=5385934